1. Field of the Invention
The present invention relates to an improvement in overshoot in a voltage regulator.
2. Description of the Related Art
FIG. 3 illustrates a circuit diagram of a related-art voltage regulator. The related-art voltage regulator includes an error amplifier 110, PMOS transistors 120 and 201, an NMOS transistor 202, resistors 211, 212, 213, and 214, capacitors 231 and 232, a power supply terminal 100, a ground terminal 101, a reference voltage terminal 102, and an output terminal 103.
The error amplifier 110 controls a gate of the PMOS transistor 120, and an output voltage Vout is thereby output from the output terminal 103. The output voltage Vout has a value determined by dividing a voltage of the reference voltage terminal 102 by a total resistance value of the resistor 212 and the resistor 213 and multiplying the resultant value by a total resistance value of the resistor 211, the resistor 212, and the resistor 213. In order to reduce an overshoot of the output voltage Vout, the PMOS transistor 201, the NMOS transistor 202, and the resistor 214 are provided. When an overshoot occurs, the NMOS transistor 202 is turned on to cause a current to flow through the resistor 214. Then, a voltage is generated across the resistor 214 to turn on the PMOS transistor 201. When the PMOS transistor 201 is turned on, the gate of the PMOS transistor 120 is pulled up to a power supply voltage to turn off the PMOS transistor 120. In this manner, an increase in overshoot can be prevented (see, for example, Japanese Patent Application Laid-open No. 2005-92693).
In the related-art voltage regulator, however, there is a problem in that it may take time to control so that a predetermined output voltage may be output from the state in which an overshoot occurs and the PMOS transistor 120 is turned off. Further, there is another problem in that an output current may become insufficient to decrease the output voltage while the output voltage is controlled to be a predetermined output voltage from the state in which an overshoot occurs and the PMOS transistor is turned off.